Company Name: Excellent Integrated System LIMITED

Contact Person : John

Email/Msn    :John(at)eis-ic.com

Tel          : 00852-30777742

Add.: RM 906, WORKINGBERG COMM BLDG, 41-47 MARBLE RD, HONGKONG

Excellent Integrated System LIMITED (EIS LIMITED), Established in 1991, is a professional independent stocking distributor of electronic components and specialize in buying the EXCESS STOCK from the original equipment manufacturers (OEMs), Contract equipment manufacturers (CEMs), and many other factories. EIS has gained good experiences in Excess Inventory Management through its development over 20 years and has become the reliable partner for the domestic and foreign OEM manufacturers. If any inquiry and question,please email us: john(at)eis-ic.com.

Description as follow:

The DS90C383BMT is a 3.3V Programmable LVDS Transmitter. It converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. The DS90C383BMT can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. The DS90C383BMT is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.

Parametrics

DS90C383BMT absolute maximum ratings: (1)Supply Voltage (VCC):-0.3V to +4V; (2)CMOS/TTL Input Voltage:-0.3V to (VCC + 0.3V); (3)LVDS Driver Output Voltage:-0.3V to (VCC + 0.3V); (4)LVDS Output Short Circuit: Duration:Continuous; (5)Junction Temperature:+150℃; (6)Storage Temperature:-65℃ to +150℃; (7)Lead Temperature(Soldering, 4 sec):+260℃.

Features

DS90C383BMT features: (1)18 to 68 MHz shift clock support; (2)Best–in–Class Set & Hold Times on TxINPUTs; (3)Tx power consumption < 130 mW (typ) @65MHz Grayscale; (4)40% Less Power Dissipation than BiCMOS Alternatives; (5)Tx Power-down mode < 60μW (typ); (6)Supports VGA, SVGA, XGA and Dual Pixel SXGA.; (7)Narrow bus reduces cable size and cost; (8)Up to 1.8 Gbps throughput; (9)Up to 227 Megabytes/sec bandwidth; (10)345 mV (typ) swing LVDS devices for low EMI; (11)PLL requires no external components; (12)Compatible with TIA/EIA-644 LVDS standard; (13)Low profile 56-lead TSSOP package; (14)Improved replacement for: SN75LVDS83, DS90C383; (15)No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered.

Diagrams